Reduces Scanning Electron Microscope Imaging Time and Creates Standard Cell Libraries Directly from Circuit Images
These algorithms apply artificial intelligence to reverse engineering and hardware assurance, decreasing the time required to image integrated circuits and enabling successful logic extraction when no standard cell library is available. The semiconductor industry commonly uses scanning electron microscopy (SEM) to image chips for failure analysis, hardware assurance, and reverse engineering. To ensure image accuracy, SEM typically uses a high magnification setting for all chip structures regardless of shape or size, which inflates the imaging time requirement, especially for increasingly complex circuits. Available algorithms for extracting the overall logic of an integrated circuit require its template standard cell library, which inhibits the reverse engineering of commercial off-the-shelf components with no design information available.
Researchers at the University of Florida have developed a set of algorithms that improve SEM imaging and reverse engineering of integrated circuits. One algorithm intelligently and automatically adjusts magnification to improve overall SEM imaging time while maintaining accuracy, and the other creates standard cell libraries directly from SEM images to facilitate reverse engineering of integrated circuits with no known design details.
Application
Intelligent SEM imaging of integrated circuits that is much faster for more efficient hardware assurance; automated algorithm that allows reverse engineering with no knowledge of an integrated circuit’s design rules
Advantages
- Automatically updates SEM magnification, greatly reducing imaging time requirements for IC hardware assurance or reverse engineering
- Accounts for shape and size of IC structures, tuning magnification to make features in image clearly visible
- Imaging algorithm is simple and parallelizable, improving efficiency of any existing imaging platform
- Extracts the standard cell library from an SEM image, enabling reverse engineering of ICs without knowing any of its design rules
Technology
The first algorithm incorporates the idea of shapes and sizes to integrated circuit structures in scanning electron microscope (SEM) imaging and dynamically adjusts parameters so that larger structures get imaged with lower magnification and smaller structures with higher magnification. This introduces the flexibility of automation to a previously hand-tuned imaging platform, saving considerable time in the imaging step of hardware assurance and reverse engineering. The second algorithm determines design details of an integrated circuit from raw SEM images of the contact layer. It extracts a circuit’s standard cell library itself, allowing successful logic extraction from chips with completely unknown design rules, such as certain commercial off-the-shelf devices.
Brochure
