An apparatus and method are provided for mitigating performance degradation in digital low-dropout voltage regulators (DLDOs) caused by the effects of aging on the power transistors of the DLDO, such as by the effects of negative bias temperature instability (NBTI)-induced aging, for example. The apparatus comprises a shift register for use in a DLDO that is configured to activate and deactivate power transistors of the DLDO to evenly distribute electrical stress among the transistors in a way that mitigates performance degradation of the DLDO under various load current conditions. In addition, the shift register and methodology can be implemented in such a way that nearly no extra power and area overhead are consumed.USF inventors have developed a NBTI aware digital low-dropout regulator. Uni-directional shift register is employed to evenly distribute the electrical stress and mitigate the NBTI effects under arbitrary load conditions with negligible power and area overhead. It is demonstrated through simulation of an IBM POWER8 microprocessor that the proposed NBTI-aware design can achieve up to 43.2% performance improvement as compared to a conventional DLDO. These regulators find applications in the manufacturing of microprocessors, internet of things (IoT), wireless energy harvesting and aerospace engineering.
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