The present disclosure presents various systems and methods for implementing a physical unclonable function device. One such method comprises providing an integrated circuit having a plurality of set/reset flip flop logic circuits, wherein each of the set/reset flip flop logic circuits enters a metastable state for a particular input sequence. The method includes varying circuit parameters for each of the plurality of set/reset flip flop logic circuits to account for manufacturing variations in the set/reset flip flop logic circuits and enable generating a stable but random output in response to the particular input sequence. Thus, by applying the particular input sequence to the integrated circuit, a unique identifier for the integrated circuit can be derived from an output response of the plurality of set/reset flip flop logic circuitsThe novel PUF design proposed is unlike previous studies which typically require additional hardware to count the oscillation frequency. This design employs SR-FF to construct low-cost PUF and reuses the SR-FF already present by varying channel length and temperature to account for intra– and inter-chip variations. The SR-FF PUF responses can be potentially unique during a transient noise based simulation. Furthermore, the responses can be evaluated for resilience against adversarial machine learning attacks. The technology can be implemented in integrated circuits and in applications that require high security, specifically cryptography.
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